Publications and Presentations

All materials are subject to copyrights.

Comprehensive Project Papers

title: Nano-Crossbar based Computing: Lessons Learned and Future Directions authors: Mustafa Altun, Ismail Cevik, Ahmet Erten, Osman Eksik, Mircea Stan, and Csaba Andras Moritz presented at: Design, Automation, and Test in Europe (DATE), Grenoble, France, 2020.

Paper

Slides

title: Logic Synthesis and Testing Techniques for Switching Nano-Crossbar Arrays authors: Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, and Mehdi Tahoori appeared in: Microprocessors and Microsystems, Vol. 54, pp. 14–25, 2017.

Paper

title: Computing with Nano-Crossbar Arrays: Logic Synthesis and Fault Tolerance authors: Mustafa Altun, Valentina Ciriani, and Mehdi Tahoori presented at: Design, Automation, and Test in Europe (DATE), Lausanne, Switzerland, 2017.

Paper

Slides

title: Synthesis and Performance Optimization of a Switching Nano-crossbar Computer authors: Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, and Mehdi Tahoori presented at: Euromicro Conference on Digital System Design (DSD), Limassol, Cyprus, 2016.

Paper

Slides

Papers on Logic Synthesis

title: Novel Methods for Efficient Realization of Logic Functions Using Switching Lattices authors: Levent Aksoy and Mustafa Altun accepted in: IEEE Transactions on Computers, 2019.

Paper

title: A Satisfiability-Based Approximate Algorithm for Logic Synthesis Using Switching Lattices authors: Levent Aksoy and Mustafa Altun presented at: Design, Automation and Test in Europe (DATE), Florence, Italy, 2019.

Paper

Slides

title: Optimal and Heuristic Algorithms to Synthesize Lattices of Four-Terminal Switches authors: Ceylan Morgul and Mustafa Altun appeared in: Integration, the VLSI Journal, Vol. 64, pp. 60–70, 2019.

Paper

title: Composition of Switching Lattices for Regular and for Decomposed Functions authors: Anna Bernasconi, Valentina Ciriani, Luca Frontini, and Gabriella Trucco appeared in: Microprocessors and Microsystems, Vol. 60, pp. 207–218, 2018.

Paper

title: Enhancing Logic Synthesis of Switching Lattices by Generalized Shannon Decomposition Methods authors: Anna Bernasconi, Valentina Ciriani, Luca Frontini, Valentino Liberali, Gabriella Trucco, and Tiziano Villa appeared in: Microprocessors and Microsystems, Vol. 56, pp. 193–202, 2018.

Paper

title: Composition of Switching Lattices and Autosymmetric Boolean Function Synthesis authors: Anna Bernasconi, Valentina Ciriani, Luca Frontini, and Gabriella Trucco presented at: Euromicro Conference on Digital System Design (DSD), Vienna, Austria 2017.

Paper

Slides

title: Synthesis on Switching Lattices of Dimension-Reducible Boolean Functions authors: Anna Bernasconi, Valentina Ciriani, Luca Frontini, and Gabriella Trucco presented at: International Conference on Very Large Scale Integration (VLSI-SoC), Tallinn, Estonia, 2016

Paper

Slides

title: Logic Synthesis for Switching Lattices by Decomposition with P-Circuits authors: Anna Bernasconi, Valentina Ciriani, Luca Frontini, Valentino Liberali, Gabriella Trucco, and Tiziano Villa presented at: Euromicro Conference on Digital System Design (DSD), Limassol, Cyprus, 2016.

Paper

Slides

title: Synthesis and Optimization of Switching Nanoarrays authors: Ceylan Morgul and Mustafa Altun appeared in: Low-Dimensional and Nanostructured Materials and Devices, Springer International Publishing, pp. 635–660, 2016. presented at: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Belgrade, Serbia, 2015.

Paper

Slides

Papers on Fault Tolerance, Performance Modeling and Optimization

title: Noise-induced Performance Enhancement of Variability-aware Memristor Networks authors: Vasileios Ntinas, Iosif-Angelos Fyrigos, Georigos Sirakoulis, Antonio Rubio, Javier Martín-Martinez, Rosana Rodriguez, and Montserrat Nafria presented at: IEEE International Conference on Electronics Circuits and Systems (ICECS), Genova, Italy, 2019.

Paper

Slides

title: Analog Neural Network based on Memristor Crossbar Arrays authors: Hacer Yildiz, Mustafa Altun, Dogus Gungordu, and Mircea Stan presented at: International Conference on Electrical and Electronics Engineering (ELECO), Bursa, Turkey, 2019.

Paper

Slides

title: Testability of Switching Lattices in the Cellular Fault Model authors: Anna Bernasconi, Valentina Ciriani, and Luca Frontini presented at: Euromicro Conference on Digital System Design (DSD), Chalkidiki, Greece, 2019.

Paper

Slides

title: Fault Mitigation of Switching Lattices under the Stuck-At-Fault Model authors: Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco, and Elena Ioana Vatajelu presented at: IEEE Latin American Test Symposium (LATS), Santiago, Chile, 2019.

Paper

Slides

title: Testability of Switching Lattices in the Stuck at Fault Model authors: Anna Bernasconi, Valentina Ciriani, and Luca Frontini presented at: International Conference on Very Large Scale Integration (VLSI-SoC), Verona, Italy 2018.

Paper

Poster

title: Defect Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation authors: Onur Tunali, Ceylan Morgul, and Mustafa Altun appeared in: IEEE Micro, Vol. 38, Issue 5, pp. 22–31, 2018.

Paper

title: A Fast Hill Climbing Algorithm for Defect and Variation Tolerant Logic Mapping of Nano-Crossbar Arrays authors: Furkan Peker and Mustafa Altun appeared in: IEEE Transactions on Multi-Scale Computing Systems, Vol. 4, No. 4, pp. 522–532, 2018.

Paper

title: Logic Synthesis and Defect Tolerance for Memristive Crossbar Arrays authors: Onur Tunali and Mustafa Altun presented at: Design, Automation and Test in Europe (DATE), Dresden, Germany, 2018.

Paper

Slides

title: Yield Analysis of Nano-Crossbar Arrays for Uniform and Clustered Defect Distributions authors: Onur Tunali and Mustafa Altun presented at: IEEE International Conference on Electronics Circuits and Systems (ICECS), Batumi, Georgia, 2017.

Paper

Slides

title: A Fast Logic Mapping Algorithm for Multiple-type-Defect Tolerance in Reconfigurable Nano-Crossbar Arrays authors: Onur Tunali and Mustafa Altun accepted in: IEEE Transactions on Emerging Topics in Computing, DOI: 10.1109/TETC.2017.2755458, 2017.

Paper

title: A Survey of Fault Tolerance Algorithms for Reconfigurable Nano-Crossbar Arrays authors: Onur Tunali and Mustafa Altun appeared in: ACM Computing Surveys, Vol. 50, No. 6, Article 79, 2017.

Paper

title: Permanent and Transient Fault Tolerance for Reconfigurable Nano-Crossbar Arrays authors: Onur Tunali and Mustafa Altun appeared in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 36, Issue 5, pp. 747–760, 2017.

Paper

title: Power-Delay-Area Performance Modeling and Analysis for Nano-Crossbar Arrays authors: Ceylan Morgul, Furkan Peker, and Mustafa Altun presented at: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, USA, 2016.

Paper

Poster

Papers on Synthesis Methodology

title: Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization with Fault Tolerance authors: Ceylan Morgul, Luca Frontini, Onur Tunali, Lorena Anghel, Valentina Ciriani, Ioana Vatajelu, Csaba Moritz, Mircea Stan, Dan Alexandrescu, and Mustafa Altun appeared in: IEEE Transactions on Nanotechnology, early access, 2020.

Paper

title: Integrated Synthesis Methodology for Crossbar Arrays authors: Ceylan Morgul, Luca Frontini, Onur Tunali, Ioana Vatajelu, Valentina Ciriani, Lorena Anghel, Csaba Moritz, Mircea Stan, Dan Alexandrescu, and Mustafa Altun presented at: IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Athens, Greece, 2018.

Paper

Slides

Papers on Emerging Crossbar Memories

title: Sensing Schemes for STT-MRAMs structured with high TMR in low RA MTJs authors: Mesut Atasoyu, Mustafa Altun, and Serdar Ozoguz appeared in: Microelectronics Journal, Vol. 89, pp. 30-36, 2019.

Paper

title: Spin-Torque Memristor based Offset Cancellation Technique for Sense Amplifiers authors: Mesut Atasoyu, Mustafa Altun, Serdar Ozoguz, and Kaushik Roy presented at: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Taormina, Italy, 2017.

Paper

Slides

Papers on Technology Development

title: CMOS Implementation of Switching Lattices authors: Ismail Cevik, Levent Aksoy, and Mustafa Altun presented at: Design, Automation, and Test in Europe (DATE), Grenoble, France, 2020.

Paper

Slides

title: Realization of Four-Terminal Switching Lattices: Technology Development and Circuit Modeling authors: Serzat Safaltin, Oguz Gencer, Ceylan Morgul, Levent Aksoy, Sebahattin Gurmen, Csaba Andras Moritz, and Mustafa Altun presented at: Design, Automation and Test in Europe (DATE), Florence, Italy, 2019.

Paper

Slides