ELE 523E

Announcements

• Oct. 21th The second homework has been posted that is due 04/11/2013 before the lecture.
• Sept. 30th The first homework has been posted that is due 11/10/2013.
• Sept. 12th The class is given in the room Z2 (ground level), EEF.

Overview

As current CMOS based technologies are approaching their anticipated limits, emerging nanotechnologies are expected to replace their role in electronic circuits. This course overviews nanoelectronic circuits in a comparison with those of conventional CMOS-based. Deterministic and probobalistic emerging computing models are investigated. Regarding the interdisciplinary nature of emerging technologies, this course is appropriate for graduate students in different majors including electronics engineering, control engineering, computer science, applied physics, and mathematics. No prior course is required; only basic (college-level) knowledge in circuit design and mathematics is assumed. Topics that are covered include:

• Devices in computational nanoelectronics (in comparison with CMOS) including nano arrays, switches, and transistors.
• Introduction of emerging computing models in circuit level.
• Analysis and synthesis of deterministic and probabilistic models.
• Performance of the computing models regarding area, power, speed, and accuracy.
• Uncertainty and defects: defect tolerance techniques for permanent and transient errors.

Syllabus

Computational Nanoelectronics, Mondays 13:30-16:30, Room: Z2 (EEF), Fall 2013.

Instructor	Mustafa Altun Email: altunmus@itu.edu.tr Tel: 02122856635 Office hours: 13:30 – 15:00 on Tuesdays in Room:3005, EEF (or stop by my office any time)
Grading	Homework: 15% 3 homeworks (5% each) Midterm Exam: 25% The midterm is during the lecture time on 25/11/2013. Presentation: 20% Presentations are made individually or in groups depending on class size. Presentation topics will be posted. Final Project: 40%
Reference Books	Zomaya, Y. (2006). Handbook of Nature-Inspired and Innovative Computing: Integrating Classical Models with Emerging Technologies, Springer. Yanushkevich, S., Shmerko, V., Lyshevski, S. (2005). Logic Design of NanoICs, CRC Press. Adamatzky, A., Bull, L., Costello, B. L., Stepney, S., Teuscher, C. (2007). Unconventional Computing, Luniver Press. Stanisavljević, M., Schmid, M, Leblebici, Y. (2010). Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures, Springer. Sasao, T. (1999). Switching Theory for Logic Synthesis, Springer.
Policies	Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date. Collaboration is permitted and encouraged for homeworks, but each collaborator should turn in his/her own answers. The midterm is in open-notes and open-books format. Collaboration is not permitted for the final project.

Weekly Course Plan

Date	Topic
Week 1, 16/9/2013	Introduction
Week 2, 23/9/2013	Overview of emerging nanoscale devices and switches
Week 3, 30/9/2013	Deterministic computing models for nanoelectronic circuits
Weeks 4, 7/10/2013	Deterministic computing models for nanoelectronic circuits
Weeks 5, 14/10/2013	HOLIDAY!, no class
Week 6, 21/10/2013	Probabilistic computing models for nanoelectronic circuits
Weeks 7, 28/10/2013	Stochastic computation
Week 8, 4/11/2013	Defects and reliability in nanoelectronics
Week 9, 11/11/2013	Defect tolerance techniques
Weeks 10, 18/11/2013	Performance parameters (area, power, delay, and accuracy) and optimization
Week 11, 25/11/2013	MIDTERM
Week 12, 2/12/2013	Student presentations
Weeks 13, 9/12/2013	Student presentations
Weeks 14, 16/12/2013	Student presentations
Weeks 15, 23/12/2013	Student presentations

Course Materials

Lecture Slides	Homeworks	Exams/Projects
W1: Introduction	Homework 1
W2: Emerging Computing
W3: Quantum and Molecular Computing
W4: Computing with Nano Arrays