ELE 523E: Computational Nanoelectronics

Announcements

• Sept. 19th The class is given in the room Z2 (ground floor), EEF.

Overview

As current CMOS based technologies are approaching their anticipated limits, emerging nanotechnologies are expected to replace their role in electronic circuits. This course overviews nanoelectronic circuits in a comparison with those of conventional CMOS-based. Deterministic and probobalistic emerging computing models are investigated. Regarding the interdisciplinary nature of emerging technologies, this course is appropriate for graduate students in different majors including electronics engineering, control engineering, computer science, applied physics, and mathematics. No prior course is required; only basic (college-level) knowledge in circuit design and mathematics is assumed. Topics that are covered include:

• Circuit elements and devices in computational nanoelectronics (in comparison with CMOS) including nano-crossbar switches, reversible quantum gates, approximate circuits and systems, and emerging transistors.
• Introduction of emerging computing models in circuit level.
• Analysis and synthesis of deterministic and probabilistic models.
• Performance of the computing models regarding area, power, speed, and accuracy.
• Uncertainty and defects: defect tolerance techniques for permanent and transient errors.

Syllabus

ELE 523E: Computational Nanoelectronics, CRN: 15371, Mondays 13:30-16:30, Room: Z2 (Ground Floor-EEF), Fall 2016.

Instructor	Mustafa Altun Email: altunmus@itu.edu.tr Tel: 02122856635 Office hours: 14:00 – 15:00 on Tuesdays in Room:3005, EEF (or stop by my office any time)
Grading	Homework: 20% 4 homeworks (5% each) Midterm Exam: 20% The midterm is during the lecture time on 6/12/2016. Presentation: 20% Presentations are made individually or in groups depending on class size. Presentation topics will be posted. Final Project: 40%
Reference Books	Zomaya, Y. (2006). Handbook of Nature-Inspired and Innovative Computing: Integrating Classical Models with Emerging Technologies, Springer. Yanushkevich, S., Shmerko, V., Lyshevski, S. (2005). Logic Design of NanoICs, CRC Press. Adamatzky, A., Bull, L., Costello, B. L., Stepney, S., Teuscher, C. (2007). Unconventional Computing, Luniver Press. Stanisavljević, M., Schmid, M, Leblebici, Y. (2010). Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures, Springer. Sasao, T. (1999). Switching Theory for Logic Synthesis, Springer.
Policies	Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date. Collaboration is permitted and encouraged for homeworks, but each collaborator should turn in his/her own answers. The midterm is in closed-notes and closed-books format. Collaboration is not permitted for the final project.

Weekly Course Plan

Date	Topic
Week 1, 19/9/2016	Introduction
Week 2, 26/9/2016	Overview of emerging nanoscale devices and switches
Week 3, 3/10/2016	Reversible quantum computing
Weeks 4, 10/10/2016	Molecular computing
Weeks 5, 17/10/2016	Computing with switching nano arrays
Week 6, 24/10/2016	Stochastic/Probabilistic computing
Weeks 7, 31/10/2016	Performance optimization for stochastic computing
Week 8, 7/11/2016	HOLIDAY, no class
Week 9, 14/11/2016	Approximate computing
Weeks 10, 21/11/2016	Defects and reliability in nanoelectronics
Week 11, 28/11/2016	Defect/variance tolerance techniques
Week 12, 6/12/2016	MIDTERM
Weeks 13, 13/12/2016	Overview of the midterm, the presentation schedule, and the final project
Weeks 14, 20/12/2016	Student presentations
Weeks 15, 27/12/2016	Student presentations

Course Materials

Lecture Slides	Lecture Slides	Lecture Slides	Homeworks	Presentations & Exams & Projects
W1: Introduction