EHB 322E: Digital Electronic Circuits

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Contents

Announcements

  • Jan. 20th As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.
  • Jan. 20th The class is given in the room 5201 (secon floor), EEF.

Syllabus

EHB 322E: Digital Electronic Circuits, CRN: 20851, Mondays 13:30-16:30, Room: 5201 (EEF), Spring 2015.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:30 on Tuesdays in Room:3005, EEF (or stop by my office any time)
Teaching Assistant

Furkan Peker

  • Email: furkan.peker061@gmail.com
  • Room: 3207 EEF
Grading
  • Quizzes: 10%
    • 2 pop-up quizzes (5% each) - no prior announcement of quiz dates and times
  • Homeworks: 10%
    • 3 homeworks (3.3% each)
  • Midterm Exams: 40%
    • 2 midterms (20% each) during the lecture time that will on 16/3/2015 and 20/4/2015.
  • Final Exam: 40%
Reference Books
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (2002). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (2002). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (2003). Cmos Digital Integrated Circuits, 3/E. Tata McGraw-Hill Education.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Quizzes and exams are in closed-notes and closed-books format.
  • To be eligible of taking the final or the resit exam, your midterm average should be at least 25 (out of 100).

Weekly Course Plan

Date
Topic
Week 1, 2/2/2015 Introduction
Week 2, 9/2/2015 Devices for digital circuits and inverters
Week 3, 16/2/2015 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 4, 23/2/2015 Optimization of multiple-stage inverters and buffers
Weeks 5, 2/3/2015 Static logic gates
Week 6, 9/3/2015 Complex logic gates and their delays
Weeks 7, 16/3/2015 MIDTERM I
Week 8, 23/3/2015 Pass transistor logic
Week 9, 30/3/2015 Pass transistor logic & Dynamic logic gates
Weeks 10, 6/4/2015 Dynamic logic gates
Week 11, 13/4/2015 Flip-flops
Week 12, 20/4/2015 MIDTERM II
Weeks 13, 27/4/2015 Synchronization of digital circuits
Weeks 14, 4/5/2015 Semiconductor memories and gate arrays

Course Materials

Homeworks & Solutions Quizzes Exams
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