ELE 523E

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(Announcements)
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 12</span>  The class is given in the room '''Z2''' (ground level), EEF.
 
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 12</span>  The class is given in the room '''Z2''' (ground level), EEF.
 
* <span style="background:#FF0000; color:#FFFFFF; font-size: 100%;"> Sept. 12</span>  The class is given in the room '''Z2''' (ground level), EEF.
 
* <span style="background:#FF0000; color:#FFFFFF; font-size: 100%;"> Sept. 12</span>  The class is given in the room '''Z2''' (ground level), EEF.
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* <span style="background:#8B0000; color:#FFFFFF; font-size: 100%;"> Sept. 12</span>  The class is given in the room '''Z2''' (ground level), EEF.
  
 
== Syllabus ==
 
== Syllabus ==

Revision as of 20:43, 12 September 2013

Contents

Announcements

  • Sept. 12 The class is given in the room Z2 (ground level), EEF.
  • Sept. 12 The class is given in the room Z2 (ground level), EEF.
  • Sept. 12 The class is given in the room Z2 (ground level), EEF.

Syllabus

Computational Nanoelectronics, Mondays 13:30-16:30, Room: Z2 (EEF), Fall 2013.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 13:30 – 15:00 on Tuesdays in Room:3005, EEF (or stop by my office any time)
Grading
  • Homework: 15%
    • 3 homeworks (5% each)
  • Midterm Exam: 25%
    • The midterm is during the lecture time on 25/11/2013.
  • Presentation: 20%
    • Presentations are made individually or in groups depending on class size.
    • Presentation topics will be posted.
  • Final Project: 40%
Reference Books
  • Zomaya, Y. (2006). Handbook of Nature-Inspired and Innovative Computing: Integrating Classical Models with Emerging Technologies, Springer.
  • Yanushkevich, S., Shmerko, V., Lyshevski, S. (2005). Logic Design of NanoICs, CRC Press.
  • Adamatzky, A., Bull, L., Costello, B. L., Stepney, S., Teuscher, C. (2007). Unconventional Computing, Luniver Press.
  • Stanisavljević, M., Schmid, M, Leblebici, Y. (2010). Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures, Springer.
  • Sasao, T. (1999). Switching Theory for Logic Synthesis, Springer.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Collaboration is permitted and encouraged for homeworks, but each collaborator should turn in his/her own answers.
  • The midterm is in open-notes and open-books format.
  • Collaboration is not permitted for the final project.

Weekly Course Plan

Date
Topic
Week 1, 16/9/2013 Introduction
Week 2, 23/9/2013 Overview of emerging nanoscale devices and switches
Week 3, 30/9/2013 Deterministic computing models for nanoelectronic circuits
Weeks 4, 7/10/2013 Deterministic computing models for nanoelectronic circuits
Weeks 5, 14/10/2013 HOLIDAY!, no class
Week 6, 21/10/2013 Probabilistic computing models for nanoelectronic circuits
Weeks 7, 28/10/2013 Stochastic computation
Week 8, 4/11/2013 Stochastic computation
Week 9, 11/11/2013 Defects and reliability in nanoelectronics
Weeks 10, 18/11/2013 Defect tolerance techniques
Week 11, 25/11/2013 MIDTERM
Week 12, 2/12/2013 Performance parameters (area, power, delay, and accuracy) and optimization
Weeks 13, 9/12/2013 Student presentations
Weeks 14, 16/12/2013 Student presentations
Weeks 15, 23/12/2013 Student presentations

Course Materials

Lecture Slides Homeworks Exams/Projects
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