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From NANOxCOMP H2020 Project
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| style="padding:2px;" | <h2 id="mp-itn-h2" style="margin:3px; background:#BC8F8F; font-size:125%; font-weight:bold; border:1px solid #BA55D3; text-align:left; color:#000; padding:0.2em 0.4em;">Project news</h2> | | style="padding:2px;" | <h2 id="mp-itn-h2" style="margin:3px; background:#BC8F8F; font-size:125%; font-weight:bold; border:1px solid #BA55D3; text-align:left; color:#000; padding:0.2em 0.4em;">Project news</h2> | ||
| − | * | + | * We present our work "''Computing with Nano-Crossbar Arrays: Logic Synthesis and Fault Tolerance''" in a premier conference on electronic design automation [http://www.date-conference.com/ DATE 2017]. |
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| − | * | + | * Our paper is accepted in a leading journal [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43 TCAD]. |
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| − | * | + | * We give an invited talk "''EU H2020 Success Story''" in [http://msca-association.teamwork.fr/en/programme H2020 MSCA 2016 Istanbul Training & Info Event]. |
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| − | * | + | * We present our work "''Power-Delay-Area Performance Modeling and Analysis for Nano-Crossbar Arrays''" in [http://www.isvlsi.org/ IEEE-ISVLSI 2016]. |
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| + | * We give an invited talk "''Circuit Design and Optimization of Nano-Crossbar Arrays''" in [http://www.nanotr12.org/ NanoTR-12]. | ||
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| + | * We give a plenary talk "''Implementation of a Switching Nano-Crossbar Computer''" in [http://www.wseas.org/cms.action?id=11327 ACT 2016]. | ||
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| + | * We present and exhibit our ''EU H2020 project NANOxCOMP'' in a premier conference on electronic design automation [http://www.date-conference.com/ DATE 2016] with over 1000 attendees from academia and industry. | ||
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Revision as of 21:46, 10 April 2017
Welcome to the NANOxCOMP Project | |
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Nano-crossbar arrays have emerged as a strong candidate technology to replace CMOS in near future. They are regular and dense structures, and fabricated by exploiting self-assembly as opposed to purely using lithography based conventional and relatively costly CMOS fabrication techniques. Currently, nano-crossbar arrays are fabricated such that each crosspoint can be used as a conventional electronic component such as a diode, a FET, or a switch. This is a unique opportunity that allows us to integrate well developed conventional circuit design techniques into nano-crossbar arrays. Motivated by this, we aim to develop a complete synthesis and performance optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer.
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