BLG 231E

Revision as of 19:57, 12 September 2015

BLG 231E: Digital Circuits, CRN: 12876, Tuesdays 13:30-16:30, Room: 2106 (EEF), Fall 2015.

Instructor	Mustafa Altun Email: altunmus@itu.edu.tr Tel: 02122856635 Office hours: 15:00 – 16:30 on Thursdays in Room:3005, EEF (or stop by my office any time)
Teaching Assistant	Furkan Peker Email: furkan.peker061@gmail.com Room: 3207 EEF
Grading	Homeworks: 15% 3 homeworks (5% each) Midterm Exams: 45% 2 midterms (22.5% each) during the lecture time that will on 21/10/2014 and 25/11/2014. Final Exam: 40%
Textbook	Wakerly, J. F. (2005). Digital Design Principles & Practices, 4th edition. Prentice Hall.
Reference Books	Roth Jr, C., & Kinney, L. (2013). Fundamentals of logic design. Cengage Learning. Mano, M. M., & Kime, C. R. (2008). Logic and Computer Design Fundamentals, 4/E edition, Prentice Hall.
Policies	Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date. Exams are in closed-notes and closed-books format. To be eligible of taking the final or the resit exam, you should take both midterms and your midterm average should be at least 25 (out of 100).

Date	Topic
Week 1, 9/9/2014	Introduction
Week 2, 16/9/2014	Digital logic fundamentals: gates, combinational circuits, Boolean expressions
Week 3, 23/9/2014	Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares"
Weeks 4, 30/9/2014	Logic minimization: Karnaugh maps, Quine-McCluskey method
Weeks 5, 7/10/2014	HOLIDAY!, no class
Week 6, 14/10/2014	Quine-McCluskey method, binary decision diagrams, hazards
Weeks 7, 21/10/2014	MIDTERM I
Week 8, 28/10/2014	HOLIDAY!, no class
Week 9, 4/11/2014	Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.)
Weeks 10, 11/11/2014	Combinational circuit design: arithmetic operations
Week 11, 18/11/2014	Sequential circuits: latches & flip-flops
Week 12, 25/11/2014	MIDTERM II
Weeks 13, 2/12/2014	Sequential circuit design: state graphs and tables, modules
Weeks 14, 9/12/2014	Sequential circuit design: modules, state machines

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 == Syllabus ==
-<div style="font-size: 120%;"> '''BLG 231E: Digital Circuits''', CRN: 11043, Tuesdays 13:30-16:30, Room: 2104 (EEF), Fall 2014. </div>
+<div style="font-size: 120%;"> '''BLG 231E: Digital Circuits''', CRN: 12876, Tuesdays 13:30-16:30, Room: 2106 (EEF), Fall 2015. </div>
 {| border="1" cellspacing="0" cellpadding="5" " width="80%"
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 | <div style="font-size: 120%;"> '''Teaching Assistant'''</div>
          ||
-Salih Vehbi Cömert
+Furkan Peker
-* Email: vehbicomert@gmail.com
+* Email: furkan.peker061@gmail.com
-* Room: 3009 EEF
+* Room: 3207 EEF
 |-
 |  <div style="font-size: 120%;"> '''Grading'''</div>