BLG 231E
From NANOxCOMP H2020 Project
(Difference between revisions)
(→Course Materials) |
(→Weekly Course Plan) |
||
Line 70: | Line 70: | ||
|| <div style="font-size: 120%;"> '''Topic'''</div> | || <div style="font-size: 120%;"> '''Topic'''</div> | ||
|- | |- | ||
− | | Week 1, | + | | Week 1, 23/9/2016 || Introduction |
|- | |- | ||
− | | Week 2, | + | | Week 2, 30/9/2016 || Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
|- | |- | ||
− | | Week 3, | + | | Week 3, 7/10/2016 || Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
|- | |- | ||
− | | Weeks 4, | + | | Weeks 4, 14/10/2016 || Logic minimization: Karnaugh maps, Quine-McCluskey method |
|- | |- | ||
− | | Weeks 5, | + | | Weeks 5, 21/10/2016 || Quine-McCluskey method, binary decision diagrams, hazards |
|- | |- | ||
− | | Week 6, | + | | Week 6, 28/10/2016 || Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
|- | |- | ||
− | | Weeks 7, | + | | Weeks 7, 4/11/2016 || MIDTERM I |
|- | |- | ||
− | | Week 8, | + | | Week 8, 11/11/2016 || HOLIDAY, no class |
|- | |- | ||
− | | Week 9, | + | | Week 9, 18/11/2016 || Combinational circuit design: implementing Boolean and arithmetic operations |
|- | |- | ||
− | | Weeks 10, | + | | Weeks 10, 25/11/2016 || Performance analysis of combinational circuits |
|- | |- | ||
− | | Week 11, | + | | Week 11, 2/12/2016 || Sequential circuits: latches & flip-flops |
|- | |- | ||
− | | Week 12, | + | | Week 12, 9/12/2016 || MIDTERM II |
|- | |- | ||
− | | Weeks 13, | + | | Weeks 13, 16/12/2016 || Sequential circuit design: state graphs and tables, modules |
|- | |- | ||
− | | Weeks 14, | + | | Weeks 14, 23/12/2016 || Sequential circuit design: modules, state machines |
|- | |- | ||
− | | Weeks 15, | + | | Weeks 15, 30/12/2016 || Sequential circuit design: modules, state machines |
|} | |} | ||
Revision as of 09:58, 26 August 2016
Contents |
Announcements
- Aug. 26th The class is given in the room 5204 (second floor), EEF.
Syllabus
BLG 231E: Digital Circuits, CRN: 10647, Fridays 09:30-12:30, Room: 5204 (EEF), Fall 2016.
Instructor
|
|
Teaching Assistant
|
Furkan Peker
Ensar Vahapoğlu
|
Grading
|
|
Textbook
|
|
Reference Books
|
|
Policies
|
|
Weekly Course Plan
Date
|
Topic
|
Week 1, 23/9/2016 | Introduction |
Week 2, 30/9/2016 | Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
Week 3, 7/10/2016 | Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
Weeks 4, 14/10/2016 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
Weeks 5, 21/10/2016 | Quine-McCluskey method, binary decision diagrams, hazards |
Week 6, 28/10/2016 | Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
Weeks 7, 4/11/2016 | MIDTERM I |
Week 8, 11/11/2016 | HOLIDAY, no class |
Week 9, 18/11/2016 | Combinational circuit design: implementing Boolean and arithmetic operations |
Weeks 10, 25/11/2016 | Performance analysis of combinational circuits |
Week 11, 2/12/2016 | Sequential circuits: latches & flip-flops |
Week 12, 9/12/2016 | MIDTERM II |
Weeks 13, 16/12/2016 | Sequential circuit design: state graphs and tables, modules |
Weeks 14, 23/12/2016 | Sequential circuit design: modules, state machines |
Weeks 15, 30/12/2016 | Sequential circuit design: modules, state machines |
Course Materials
Homeworks & Solutions | Quizzes & Solutions | Exams |
---|---|---|