EHB 322E
From NANOxCOMP H2020 Project
(Difference between revisions)
(→Announcements) |
|||
(103 intermediate revisions by one user not shown) | |||
Line 1: | Line 1: | ||
{{DISPLAYTITLE: EHB 322E: Digital Electronic Circuits}} | {{DISPLAYTITLE: EHB 322E: Digital Electronic Circuits}} | ||
== Announcements == | == Announcements == | ||
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> | + | |
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Apr. 8th</span> To see your grades [[Media:ehb322e-2017-spring-grades.pdf | ''' click here''']]. |
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Apr. 4th</span> [[Media:ehb322e-2017-spring-hw-02.pdf | '''The second homework''']] has been posted that is due 17/04/2017 (before the lecture). |
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Mar. 16th</span> Midterm-1 will be held in rooms '''5302''' and '''5202''' between '''15:30 - 17:30''' on March 20th. |
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 20th</span> [[Media:ehb322e-2017-spring-hw-01.pdf | '''The first homework''']] has been posted that is due 06/03/2017 (before the lecture). |
− | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 6th</span> The class is given in the room '''5302''' (third floor), EEF. | |
+ | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 3rd</span> As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, '''LTspice''' is a good and free choice; you can download it by [http://www.linear.com/designtools/software/#LTspice/ '''clicking here''']. | ||
== Syllabus == | == Syllabus == | ||
− | <div style="font-size: 120%;"> '''EHB 322E: Digital Electronic Circuits''', CRN: | + | <div style="font-size: 120%;"> '''EHB 322E: Digital Electronic Circuits''', CRN: 21161, Mondays 13:30-16:30, Room: 5302 (EEF), Spring 2017. </div> |
{| border="1" cellspacing="0" cellpadding="5" " width="80%" | {| border="1" cellspacing="0" cellpadding="5" " width="80%" | ||
Line 23: | Line 24: | ||
| <div style="font-size: 120%;"> '''Teaching Assistant'''</div> | | <div style="font-size: 120%;"> '''Teaching Assistant'''</div> | ||
|| | || | ||
− | + | ||
− | * Email: | + | Furkan Peker |
− | * Room: | + | * Email: furkan.peker061@gmail.com |
+ | * Room: 3207 EEF | ||
+ | |||
|- | |- | ||
| <div style="font-size: 120%;"> '''Grading'''</div> | | <div style="font-size: 120%;"> '''Grading'''</div> | ||
Line 37: | Line 40: | ||
* Midterm Exams: '''40%''' | * Midterm Exams: '''40%''' | ||
− | ** 2 midterms (20% each) during the lecture time that will on | + | ** 2 midterms (20% each) during the lecture time that will on '''20/3/2017''' and '''24/4/2017'''. |
* Final Exam: '''40%''' | * Final Exam: '''40%''' | ||
Line 43: | Line 46: | ||
| <div style="font-size: 120%;"> '''Reference Books'''</div> | | <div style="font-size: 120%;"> '''Reference Books'''</div> | ||
|| | || | ||
− | * Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. ( | + | * Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall. |
− | * Uyemura, J. P. ( | + | * Uyemura, J. P. (20XX). CMOS logic circuit design. Springer. |
− | * Kang, S. M., & Leblebici, Y. ( | + | * Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education. |
|- | |- | ||
| <div style="font-size: 120%;"> '''Policies'''</div> | | <div style="font-size: 120%;"> '''Policies'''</div> | ||
Line 52: | Line 55: | ||
* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date. | * Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date. | ||
* Quizzes and exams are in '''closed-notes''' and '''closed-books''' format. | * Quizzes and exams are in '''closed-notes''' and '''closed-books''' format. | ||
− | * To be eligible of taking the final or the resit exam, | + | * To be eligible of taking the final or the resit exam, your midterm average should be at least '''25''' (out of 100). |
|} | |} | ||
Line 64: | Line 67: | ||
|| <div style="font-size: 120%;"> '''Topic'''</div> | || <div style="font-size: 120%;"> '''Topic'''</div> | ||
|- | |- | ||
− | | Week 1, | + | | Week 1, 6/2/2017 || Introduction |
|- | |- | ||
− | | Week 2, | + | | Week 2, 13/2/2017 || Switching theory & devices for digital circuits and inverters |
|- | |- | ||
− | | Week 3, | + | | Week 3, 20/2/2017 || NMOS/CMOS inverters & their static and dynamic behaviors |
|- | |- | ||
− | | Weeks 4, | + | | Weeks 4, 27/2/2017 || Optimization of multiple-stage inverters and buffers |
|- | |- | ||
− | | Weeks 5, | + | | Weeks 5, 6/3/2017 || Static logic gates and area-delay-power performance analysis |
|- | |- | ||
− | | Week 6, | + | | Week 6, 13/3/2017 || Complex logic gates and their delays |
|- | |- | ||
− | | Weeks 7, | + | | Weeks 7, 20/3/2017 || MIDTERM I |
|- | |- | ||
− | | Week 8, | + | | Week 8, 27/3/2017 || HOLIDAY, no class |
+ | |- | ||
+ | | Week 9, 3/4/2017 || Pass transistor logic with Shannon's expansion and performance analysis | ||
|- | |- | ||
− | | | + | | Weeks 10, 10/4/2017 || Dynamic logic gates, synchronization, and performance analysis |
|- | |- | ||
− | | | + | | Week 11, 17/4/2017 || Static and dynamic memory elements: D, SR, and JK flip-flops |
|- | |- | ||
− | | Week | + | | Week 12, 24/4/2017 || MIDTERM II |
|- | |- | ||
− | | | + | | Weeks 13, 1/5/2017 || HOLIDAY, no class |
|- | |- | ||
− | | Weeks | + | | Weeks 14, 8/5/2017 || Synchronization and timing analysis of digital circuits having logic and memory elements |
|- | |- | ||
− | | Weeks | + | | Weeks 15, 15/5/2017 || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories |
|} | |} | ||
Line 96: | Line 101: | ||
{| border="1" cellspacing="0" cellpadding="5" | {| border="1" cellspacing="0" cellpadding="5" | ||
− | ! Homeworks & Solutions!! Quizzes !! Exams | + | ! Homeworks & Solutions!! Quizzes & Solutions!! Exams |
|- | |- | ||
− | | | + | | [[Media:ehb322e-2017-spring-hw-01.pdf | Homework 1]] & [[Media:ehb322e-2017-spring-hw-01-solutions.pdf | Solutions]] || [[Media:ehb322e-2017-spring-quiz-01.pdf | Quiz 1]] & [[Media:ehb322e-2017-spring-quiz-01-solutions.pdf | Solutions]] || [[Media:ehb322e-2017-spring-midterm-01.pdf | Midterm 1]] |
|- | |- | ||
− | | | + | | [[Media:ehb322e-2017-spring-hw-02.pdf | Homework 2]] || || |
|- | |- | ||
− | | | + | | || || |
|} | |} |
Latest revision as of 23:58, 8 April 2017
Contents |
[edit] Announcements
- Apr. 8th To see your grades click here.
- Apr. 4th The second homework has been posted that is due 17/04/2017 (before the lecture).
- Mar. 16th Midterm-1 will be held in rooms 5302 and 5202 between 15:30 - 17:30 on March 20th.
- Feb. 20th The first homework has been posted that is due 06/03/2017 (before the lecture).
- Feb. 6th The class is given in the room 5302 (third floor), EEF.
- Feb. 3rd As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.
[edit] Syllabus
EHB 322E: Digital Electronic Circuits, CRN: 21161, Mondays 13:30-16:30, Room: 5302 (EEF), Spring 2017.
Instructor
|
|
Teaching Assistant
|
Furkan Peker
|
Grading
|
|
Reference Books
|
|
Policies
|
|
[edit] Weekly Course Plan
Date
|
Topic
|
Week 1, 6/2/2017 | Introduction |
Week 2, 13/2/2017 | Switching theory & devices for digital circuits and inverters |
Week 3, 20/2/2017 | NMOS/CMOS inverters & their static and dynamic behaviors |
Weeks 4, 27/2/2017 | Optimization of multiple-stage inverters and buffers |
Weeks 5, 6/3/2017 | Static logic gates and area-delay-power performance analysis |
Week 6, 13/3/2017 | Complex logic gates and their delays |
Weeks 7, 20/3/2017 | MIDTERM I |
Week 8, 27/3/2017 | HOLIDAY, no class |
Week 9, 3/4/2017 | Pass transistor logic with Shannon's expansion and performance analysis |
Weeks 10, 10/4/2017 | Dynamic logic gates, synchronization, and performance analysis |
Week 11, 17/4/2017 | Static and dynamic memory elements: D, SR, and JK flip-flops |
Week 12, 24/4/2017 | MIDTERM II |
Weeks 13, 1/5/2017 | HOLIDAY, no class |
Weeks 14, 8/5/2017 | Synchronization and timing analysis of digital circuits having logic and memory elements |
Weeks 15, 15/5/2017 | Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories |
[edit] Course Materials
Homeworks & Solutions | Quizzes & Solutions | Exams |
---|---|---|
Homework 1 & Solutions | Quiz 1 & Solutions | Midterm 1 |
Homework 2 | ||