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* Our paper is accepted in a leading journal in design automation [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43 IEEE TCAD]. | * Our paper is accepted in a leading journal in design automation [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43 IEEE TCAD]. | ||
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+ | * We present our work "''Synthesis on Switching Lattices of Dimension-Reducible Boolean Functions''" in [http://ati.ttu.ee/vlsi-soc2016/ VLSI-Soc 2016]. | ||
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+ | * We present our project and our work on ''logic synthesis of switching nan oarrays'' in [http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016 DSD 2016]. | ||
* We give an invited talk "''EU H2020 Success Story''" in [http://msca-association.teamwork.fr/en/programme H2020 MSCA 2016 Istanbul Training & Info Event]. | * We give an invited talk "''EU H2020 Success Story''" in [http://msca-association.teamwork.fr/en/programme H2020 MSCA 2016 Istanbul Training & Info Event]. | ||
* We present our work "''Power-Delay-Area Performance Modeling and Analysis for Nano-Crossbar Arrays''" in [http://www.isvlsi.org/ IEEE-ISVLSI 2016]. | * We present our work "''Power-Delay-Area Performance Modeling and Analysis for Nano-Crossbar Arrays''" in [http://www.isvlsi.org/ IEEE-ISVLSI 2016]. | ||
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+ | * We organize [http://sintesilogica.di.unimi.it/ the National Workshop on Logic Synthesis, July 2016] with introducing our project and preliminary research results. | ||
* We give an invited talk "''Circuit Design and Optimization of Nano-Crossbar Arrays''" in [http://www.nanotr12.org/ NanoTR-12]. | * We give an invited talk "''Circuit Design and Optimization of Nano-Crossbar Arrays''" in [http://www.nanotr12.org/ NanoTR-12]. |
Revision as of 22:45, 10 April 2017
Welcome to the NANOxCOMP Project | |
Nano-crossbar arrays have emerged as a strong candidate technology to replace CMOS in near future. They are regular and dense structures, and fabricated by exploiting self-assembly as opposed to purely using lithography based conventional and relatively costly CMOS fabrication techniques. Currently, nano-crossbar arrays are fabricated such that each crosspoint can be used as a conventional electronic component such as a diode, a FET, or a switch. This is a unique opportunity that allows us to integrate well developed conventional circuit design techniques into nano-crossbar arrays. Motivated by this, we aim to develop a complete synthesis and performance optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer.
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